Electronic circuit assemblies are often required to be capable of surviving in hostile operating environments, including those commonly found in automotive and aerospace applications. Such assemblies often employ surface-mount (SM) integrated circuit (IC) devices, which are generally characterized as being electrically and mechanically attached to the substrate of an electronic circuit assembly with a number of terminals or leads that are soldered, such as with a tin-lead solder, to conductors on the surface of the substrate. A prominent example of a SM IC is a flip chip, which has bead-like terminals typically in the form of solder bumps near an edge of the chip. After registering a flip chip to its corresponding conductor pattern on a substrate, heating above the liquidus temperature of the solder produces solder joints that serve to both secure the chip to the substrate and electrically interconnect the flip chip circuitry to the conductor pattern. Due to the numerous functions typically performed by the microcircuitry of a flip chip, a relatively large number of solder bumps are required. The size of a typical flip chip is generally on the order of a few millimeters per side, resulting in the solder bumps being crowded along the edge of the chip. As a result, flip chip conductor patterns are typically composed of numerous individual conductors that are spaced apart about 0.5 millimeter or less.
The solder joints joining a flip chip to a conductor pattern are subject to thermal stresses as a result of temperature fluctuations in the working environment of the assembly and differences in coefficients of thermal expansion (CTE) of the various materials used in the construction of the assembly. A CTE mismatch particularly exists for flip-chip-on-board (FCOB) processes in which a flip chip is mounted to an organic laminate circuit board whose multilayer laminate construction and composition yield CTEs significantly higher than the materials (e.g., silicon, quartz, etc.) from which flip chips are formed. These thermal stresses can potentially fatigue and fracture the solder joints, particularly if the flip chip is subject to many temperature excursions, high temperatures (e.g., 125.degree. C. or more), and/or intense vibration. Under such conditions, the expected life of the solder joints can dramatically decrease, particularly if the flip chip is relatively large (e.g., one-half inch per side). Notably, current integrated circuit packaging trends are toward IC devices with lower standoffs for the purpose of reducing the profile and overall size of the circuit board assembly, with the result being shorter and therefore less compliant leads.
In the prior art, various approaches have been used to reduce thermally-induced solder joint stresses. Understandably, attempts have been made to reduce the temperature extremes to which the assembly is exposed, increase the strength of the solder used to form the solder joints, incorporate additional packaging, and use circuit boards with lower CTEs. The latter approach includes forming the circuit board from such well known materials as alumina, aluminum nitride, silicon, silica, beryllium oxide and barium titanate. However, these solutions have processing and cost disadvantages, and additionally can be incompatible with some applications.
To reduce the effect of the stresses on SM IC solder joints on laminate organic substrates, such as printed circuit boards (PCB) and printed wiring boards (PWB), the prior art has employed various materials for underfilling these devices and encapsulating their solder joints in order to reduce and distribute solder joint stresses. For example, epoxy resins containing a glass filler have been used as underfill materials for SM IC devices, including flip chips. The glass filler reduces the CTE of the underfill material in order to mitigate the thermal mismatch between the flip chip and circuit board. While the use of underfill materials has been shown to sufficiently improve solder joint fatigue life to survive thermal cycling between -40.degree. C. and 125.degree. C. in accordance with standardized test methods, such improvements have not yielded flip chip solder joints that can survive extended thermal cycling between -40.degree. C. and +150.degree. C., as required for more demanding automotive and aerospace applications.
Accordingly, what is needed is a method for improving the solder joint fatigue life of flip chips and potentially other SM ICs beyond that possible with the present art. More particularly, it would be desirable if a flip chip mounted to an organic laminate circuit board could be produced that exhibits significant resistance to thermal cycle fatigue when subjected to thermal cycling between -40.degree. C. and +150.degree. C., and is therefore suitable for demanding automotive and aerospace applications.